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如果有符合条件并感兴趣的，请mail 联系我：xi.huang@panovel.com
招聘职位对经验要求比较高，如果有过类似的项目经验并且具备一定条件的也可以考虑。

公司网址：www.panovel.com

职位名称：资深ASIC验证工程师
Position title: Senior ASIC Verification Engineer
1． Responsibilities:
1) Working within an ASIC design team to develop reusable block-level and A
SIC testbenches using high-level verification

language (System Verilog).
2) Develop new ASIC verification environments to support ASIC development.

3) Review RTL architectural and implementation specifications.
4) Create stimulus drivers, monitors, dataflow models, and test plans to ve
rify function and performance of advanced SOC

ASICs.
5) Define and implement code/functional coverage plans.
6) Develop testing and regression methodologies for new verification flow.

7) Incorporate reusability into all aspects of the verification environment
.
8) Develop/maintain/enhance environment tools/scripts/makefiles.

2． Qualification:
1) Minimum of 3 years ASIC verification experience in a product development
environment with proven ASIC design

verification skills
2) Experience in using event-driven simulators like VCS
3) Fluent in Verilog for design verification
4) Experience in writing testbench using System Verilog
5) Knowledge of peripheral IP intergration (PCI, USB2.0, PCI)
6) Knowledge of AMBA/AHB/DMA
7) Experience with one or more scripting languages: Perl, TCL, Shell
8) Superior debugging skills for large ASIC designs
9) Strong written and verbal communication skills

3． Required Degree: MS
Preferred Major: Electrical Engineering or related discipline

职位名称：SoC ASIC 设计工程师
1． 职责
(1) 在UWB片上系统(SoC)上集成ARM处理器和AMBA总线；
(2) 设计DMA；
(3) 实现MAC功能，如排队管理；
(4) 与‘物理层ASIC工作组’和‘固件工作组’合作完成‘物理层-MAC’接口。
2． 资格
(1) 具有SoC设计的丰富经验；
(2) 具有ASIC设计流程的丰富；
(3) 具有ARM/AMBA集成的经验；
(4) 具有DMA设计经验；
(5) 在复杂FIFO管理方面有经验。
3． 优先考虑:
有以下经验者：ARM 集成，AMBA总线，DMA和MAC；硕士或以上学位。